CSG14K_CSG8K datasheet(79/114 Pages) AMSOSRAM

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CSG14K_CSG8K

Functional Description

Datasheet

• PUBLIC

DS000571

• v2-01 • 2023-Feb-10

113

│ 78

The row length has a minimum value because a number of parallel processes in the sensor

need to be completed within one row time. The minimal row length depends on the number of

outputs used (see equations in section 7.4.3).

The maximal row length value is only constrained by the 14 bits size of register.

Fine frame rate adjustments are done through external timing or with the FRAME_TIME

sequence. This can be useful when smaller or slower row buffers are used in the external

system.

An exception to this rule is the in-line streaming mode, where the ROW_LENGTH register

does directly alter the frame rate.

7.5.3

Vertical Windowing

The sensor supports multiple windows in the vertical direction to create regions of interest

(ROI).

Row Addressing

As introduced in section 7.1.1, the sensor has buffer pixels rows above and below the

effective pixels.

Every row in the array is paired with a physical row address. This row address is used to

specify vertical ROI positions as described in next section.

Row addresses are assigned in ascending order starting from 0 for the row closest to the

package pin row 1.

Figure 94:

Valid Row Addresses

Region

Row Address Range

(14 K)

Row Address Range

(8 K)

Active pixels

60 … 3659

772 … 2947

Recommended pixels

68 … 3651

780 … 2939

Bottom buffer pixels

0 … 59

Top buffer pixels

3660 … 3719

ROI Settings

The sensor allows up to 10 vertical windows to be concatenated in one single frame readout.

Each of these windows is enabled by setting their bit in YWIN_ENA

to ‘1’ (bit [0] = YWIN0, [1]

= YWIN1

…).

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