CSG14K_CSG8K datasheet(27/114 Pages) AMSOSRAM

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CSG14K_CSG8K

Functional Description

Datasheet

• PUBLIC

DS000571

• v2-01 • 2023-Feb-10

113

│ 26

●

Transfer of 8-bit data from master to slave (write operation) or from slave to master

(read operation).

Figure 18:

SPI Signal Overview

Pin Name

Direction

Purpose

SPI_CSN

Sensor Input

Active-low chip select

SPI_CLK

Sensor Input

Rising-edge triggered clock for SPI protocol

SPI_MOSI

Sensor Input

Data moving from master to slave

SPI_MISO

Sensor Output

Data moving from slave to master

Data is written to the registers of the SPI slave over the SPI_MOSI wire. The data written to

the programming registers can also be read out over this same SPI interface, using the

SPI_MISO wire. SPI_CSN is an active-low chip select that enables the SPI slave. The details

of the timing and data format are described below.

Figure 19:

SPI Connection Diagram

When using multiple image sensors, the SPI_CLK and SPI_MOSI can be shared among

them. The SPI_CSN operates as a chip select for each of the slaves. The SPI_MISO can also

be shared on a bus because it is tri-stated when it is not used. This configuration of one

master and multiple slaves is shown in Figure 19.

SPI

MASTER

SPI

SLAVE

SPI_CLK

SPI_MOSI

SPI_MISO

SPI_CSN

SPI_CLK

SPI_MOSI

SPI_MISO

SPI_CSN

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