MIC4600YML-TR datasheet(9/26 Pages) MICROCHIP

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DS20005584B-page 9

MIC4600

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

Pin Number

Pin Name

Description

1VIN

VIN Supply (Input): Input supply to the internal LDO. The VIN operating voltage range

is from 4.5V to 28V. Connect a decoupling capacitor between this pin and PGND.

2EN

Enable (Input): A logic level high allows normal operation. A logic level low on this pin

shuts down the drive in a low quiescent current state. The EN pin must not be left float-

ing.

HSI

High-side input (input): A logic level input that controls the high-side gate drive.

LSI

Low-side input (input): A logic level input that controls the low-side gate drive.

No Connect. Not internally connected.

6FAULT

FAULT (Output). The active-low, open-drain output pulls low during an overtempera-

ture fault. A resistor to VDD is needed to pull this signal high.

7DELAY

Delay (Output). Connect a resistor from this pin to ground to adjust the dead time

(break before make).

8, 16

AGND

Analog ground. AGND must be connected directly to the ground planes. Do not route

the AGND pin to the PGND Pad on the top layer.

9PGND

Power Ground. PGND is the ground path for the MIC4600 output drivers. The PGND

pin should be connected to the source of low-side N-Channel MOSFET and the nega-

tive terminals of decoupling capacitors.

Drive Low (Output). Low-side MOSFET gate driver.

Switch Node (Output): Internal connection for the high-side MOSFET source and

low-side MOSFET drain. Due to the high speed switching on this pin, the SW pin

should be routed away from sensitive nodes.

Drive High (Output). High-side MOSFET gate driver.

BST

Boost (output): Bootstrapped voltage to the high-side N-channel MOSFET driver. Con-

nect a Schottky diode between the VDD pin and the BST pin. Connect a boost capaci-

tor between the BST pin and the SW pin.

VDD

5V Internal Linear Regulator (Output): VDD supplies the power MOSFET gate drive

supply voltage. VDD is created by internal LDO from VIN. When VIN < +5.5V, VDD

should be tied to the VIN pin. A 2.2 μF ceramic capacitor from the VDD pin to ground

plane on PCB is required for stability.

AVDD

5V Analog Input (Input): AVDD is the supply for the internal driver logic and control cir-

cuitry. Connect the VDD output to the AVDD pin.

EPAD

ePad

Exposed thermal pad. Connect to the ground plane for optimum thermal performance.

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