Limits in standard type are for T

+125˚C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent

the most likely parametric norm at T

V

Symbol

Parameter

Conditions

Min

Typ

Max

Units

t

R

Output Rise Time (3V to 9V)

LM5100A/LM5101A

C

430

ns

Output Rise Time (3V to 9V)

LM5100B/LM5101B

570

Output Rise Time (3V to 9V)

LM5100C/LM5101C

990

t

F

Output Fall Time (3V to 9V)

LM5100A/LM5101A

C

260

ns

Output Fall Time (3V to 9V)

LM5100B/LM5101B

430

Output Fall Time (3V to 9V)

LM5100C/LM5101C

715

t

PW

Minimum Input Pulse Width that

Changes the Output

50

ns

t

BS

Bootstrap Diode Reverse Recovery

Time

I

I

37

ns

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of

the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the

Electrical Characteristics tables.

Note 2: The human body model is a 100 pF capacitor discharged through a 1.5k

Ω resistor into each pin. 2 kV for all pins except Pin 2, Pin 3 and Pin 4 which are

rated at 1000V.

Note 3: 4 layer board with Cu finished thickness 1.5/1/1/1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50 x 50mm ground and power

planes embedded in PCB. See Application Note AN-1187.

Note 4: Min and Max limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical

Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).

Note 5: The

Note 6: In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS node will generally not exceed -1V.

However, in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur,

the HS voltage must never be more negative than VDD-15V. For example if VDD = 10V, the negative transients at HS must not exceed -5V.

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