Pin Descriptions

Pin #

Name

Description

Application Information

SO-8

LLP-10

1

1

VDD

Positive gate drive supply

Locally decouple to VSS using low ESR/ESL capacitor

located as close to the IC as possible.

2

2

HB

High-side gate driver

bootstrap rail

Connect the positive terminal of the bootstrap capacitor to HB

and the negative terminal to HS. The bootstrap capacitor

should be placed as close to the IC as possible.

3

3

HO

High-side gate driver output

Connect to the gate of high-side MOSFET with a short, low

inductance path.

4

4

HS

High-side MOSFET source

connection

Connect to the bootstrap capacitor negative terminal and the

source of the high-side MOSFET.

5

7

HI

High-side driver control input

The LM5100A/B/C inputs have CMOS type thresholds. The

LM5101A/B/C inputs have TTL type thresholds. Unused

inputs should be tied to ground and not left open.

6

8

LI

Low-side driver control input

The LM5100A/B/C inputs have CMOS type thresholds. The

LM5101A/B/C inputs have TTL type thresholds. Unused

inputs should be tied to ground and not left open.

7

9

VSS

Ground return

All signals are referenced to this ground.

8

10

LO

Low-side gate driver output

Connect to the gate of the low-side MOSFET with a short, low

inductance path.

Note: For LLP-10 package, it is recommended that the exposed pad on the bottom of the package be soldered to ground plane on the PC board, and that

ground plane should extend out from beneath the IC to help dissipate heat. Pins 5 and 6 have no connection.

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