EM6620WS27 datasheet(30/56 Pages) EMMICRO

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EM6620

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8.5 Millisecond Counter Registers

Table 8.5.1 Register RegMSCCntl1

Bit

Name

Reset

R/W

Description

RunEn/Stop

R/W

Enable counter

PA3/µP

R/W

Port A or CPU start stop control

dT/MSC

R/W

Pulse-width measurement

ResMSC

R/W

Reset if write of 1

Read value is always 0

Default: Stop, CPU controlled.

Table 8.5.2 Register RegMSCCntl2

Bit

Name

Reset

R/W

Description

DebFreqSel

R/W

Debouncer frequency select

PA3Edge

R/W

PA[3] edge selection

IntSel

R/W

Interrupt source selection

FlSec

Seconds flag

Default: Ck[14] is debouncer clock, negative edge, 1/10 Sec Interrupt requests

Table 8.5.3 Register RegMSCDataL

Bit

Name

Reset

R/W

Description

BCD[3]

1/1000 Seconds BCD value 3

BCD[2]

1/1000 Seconds BCD value 2

BCD[1]

1/1000 Seconds BCD value 1

BCD[0]

1/1000 Seconds BCD value 0

Table 8.5.4 Register RegMSCDataM

Bit

Name

Reset

R/W

Description

BCD[7]

1/100 Seconds BCD value 3

BCD[6]

1/100 Seconds BCD value 2

BCD[5]

1/100 Seconds BCD value 1

BCD[4]

1/100 Seconds BCD value 0

Table 8.5.5 Register RegMSCDataH

Bit

Name

Reset

R/W

Description

BCD[11]

1/10 Seconds BCD value 3

BCD[10]

1/10 Seconds BCD value 2

BCD[9]

1/10 Seconds BCD value 1

BCD[8]

1/10 Seconds BCD value 0

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