STM32W108CB datasheet(147/278 Pages) STMICROELECTRONICS

147 / 278 page

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

Serial interfaces

Doc ID 16252 Rev 14

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Bit 5 OVRB: DMA buffer B overrun flag

This bit is set when DMA receive buffer B is passed an overrun error from the receive FIFO.

Neither receive buffer is capable of accepting any more bytes (unloaded), and the FIFO fills

up. Buffer B is the next buffer to load, and when it drains the FIFO the overrun error is passed

up to the DMA and flagged with this bit. It is cleared the next time buffer B is loaded and when

the receive DMA is reset.

0: No DMA receive buffer B overrun

1: DMA receive buffer B overrun

Bit 4 OVRA: DMA buffer A overrun flag

This bit is set when DMA receive buffer A is passed an overrun error from the receive FIFO.

Neither receive buffer is capable of accepting any more bytes (unloaded), and the FIFO fills

up. Buffer A is the next buffer to load, and when it drains the FIFO the overrun error is passed

up to the DMA and flagged with this bit. It is cleared the next time buffer A is loaded and when

the receive DMA is reset.

0: No DMA receive buffer A overrun

1: DMA receive buffer A overrun

Bit 3 TXBACK: DMA transmit buffer B acknowledge flag

This bit is set/reset by hardware when DMA transmit buffer B is active.

0: DMA transmit buffer B not active

1: DMA transmit buffer B active

Bit 2 TXAACK: DMA transmit buffer A acknowledge flag

This bit is set/reset by hardware when DMA transmit buffer A is active.

0: DMA transmit buffer A not active

1: DMA transmit buffer A active

Bit 1 RXBACK: DMA receive buffer B acknowledge flag

This bit is set/reset by hardware when DMA receive buffer B is active.

0: DMA receive buffer B not active

1: DMA receive buffer B active

Bit 0 RXBACK: DMA receive buffer A acknowledge flag

This bit is set/reset by hardware when DMA receive buffer A is active.

0: DMA receive buffer B not active

1: DMA receive buffer B active

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