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STM32W108CB Fiches technique(PDF) 145 Page - STMicroelectronics |
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STM32W108CB Fiches technique(HTML) 145 Page - STMicroelectronics |
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145 / 278 page ![]() STM32W108HB STM32W108CC STM32W108CB STM32W108CZ Serial interfaces Doc ID 16252 Rev 14 145/278 9.12.11 Serial controller transmit DMA counter register (SCx_DMATXCNTR) Address offset: 0xC828 (SC1_DMATXCNTR) and 0xC028 (SC2_DMATXCNTR) Reset value: 0x0000 0000 Reserved, must be kept at reset value CNT[12:0]: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved CNT[12:0] r r r r r rr rr rr r r Bits [31:13] Bits [12:0] The offset from the start of the active DMA transmit buffer from which the next byte is read. This register is set to zero when the buffer is loaded and when the DMA is reset. |
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