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MF4SAM3 Fiches technique(PDF) 6 Page - NXP Semiconductors |
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MF4SAM3 Fiches technique(HTML) 6 Page - NXP Semiconductors |
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6 / 31 page ![]() NXP Semiconductors MF4SAM3 MIFARE SAM AV3 secure access module MF4SAM3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product short data sheet Rev. 3.0 — 2 August 2019 COMPANY PUBLIC 561930 6 / 31 5 Pinning information 5.1 Pin description 5.1.1 PCM1.5 pin configuration Figure 2. Pin configuration PCM1.5 Table 2. Pin description PCM 1.5 MIFARE SAM AV3 ISO 7816 MIFARE SAM AV3 Pad Symbol Symbol Pad Description C1 VCC VCC C1 power supply voltage input C2 RST RST_N C2 reset input, active LOW C3 CLK CLK_N C3 clock input C4 reserved n.c. C4 n.c. C5 GND GND C5 ground (reference voltage) input C6 VPP IO3 C6 used for I2C communication to RC (SCL) C7 IO1 IO1 C7 input/output for serial data (host communication) C8 reserved IO2 C8 used for I2C communication to RC (SDA) 5.1.2 HVQFN32 pin configuration Remark: Central pad is isolated. Figure 3. Pin configuration HVQFN32 |
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