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SH7041A Fiches technique(PDF) 432 Page - Renesas Technology Corp |
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SH7041A Fiches technique(HTML) 432 Page - Renesas Technology Corp |
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432 / 923 page ![]() 394 12.7.6 Contention between TGR Read and Input Capture If an input capture signal is issued in the T 1 state of the TGR read cycle, the read data is that after input capture transfer (figure 12.81). TGR Input capture signal Internal data bus Address Read signal φ T1 T2 TGR read cycle TGR address M XM Figure 12.81 TGR Read and Input Capture Contention |
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