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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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IMX6SDLCEC Fiches technique(PDF) 111 Page - NXP Semiconductors |
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IMX6SDLCEC Fiches technique(HTML) 111 Page - NXP Semiconductors |
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111 / 169 page  Electrical Characteristics i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018 NXP Semiconductors 111 4.11.12.8 Reverse High-Speed Data Transmission Timing Figure 72. Reverse High-Speed Data Transmission Timing at Slave Side 4.11.12.9 Low-Power Receiver Timing Figure 73. Input Glitch Rejection of Low-Power Receivers 4.11.13 HSI Host Controller Timing Parameters This section describes the timing parameters of the HSI Host Controller which are compliant with High-speed Synchronous Serial Interface (HSI) Physical Layer specification version1.01. 4.11.13.1 Synchronous Data Flow Figure 74. Synchronized Data Flow READY Signal Timing (Frame and Stream Transmission) 2*TLPX 2*TLPX TMIN-RX TMIN-RX eSPIKE eSPIKE Input Output VIH VIL |
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