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IMX6SDLCEC Fiches technique(PDF) 97 Page - NXP Semiconductors |
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IMX6SDLCEC Fiches technique(HTML) 97 Page - NXP Semiconductors |
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97 / 169 page ![]() Electrical Characteristics i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018 NXP Semiconductors 97 IPUx_DISPx_DAT07 DAT[7] G[2] G[1] B[7] Y/C[7] C[7] C[7] — IPUx_DISPx_DAT08 DAT[8] G[3] G[2] G[0] — Y[0] C[8] — IPUx_DISPx_DAT09 DAT[9] G[4] G[3] G[1] — Y[1] C[9] — IPUx_DISPx_DAT10 DAT[10] G[5] G[4] G[2] — Y[2] Y[0] — IPUx_DISPx_DAT11 DAT[11] R[0] G[5] G[3] — Y[3] Y[1] — IPUx_DISPx_DAT12 DAT[12] R[1] R[0] G[4] — Y[4] Y[2] — IPUx_DISPx_DAT13 DAT[13] R[2] R[1] G[5] — Y[5] Y[3] — IPUx_DISPx_DAT14 DAT[14] R[3] R[2] G[6] — Y[6] Y[4] — IPUx_DISPx_DAT15 DAT[15] R[4] R[3] G[7] — Y[7] Y[5] — IPUx_DISPx_DAT16 DAT[16] — R[4] R[0] — — Y[6] — IPUx_DISPx_DAT17 DAT[17] — R[5] R[1] — — Y[7] — IPUx_DISPx_DAT18 DAT[18] — — R[2] — — Y[8] — IPUx_DISPx_DAT19 DAT[19] — — R[3] — — Y[9] — IPUx_DISPx_DAT20 DAT[20] — — R[4] — — — — IPUx_DISPx_DAT21 DAT[21] — — R[5] — — — — IPUx_DISPx_DAT22 DAT[22] — — R[6] — — — — IPUx_DISPx_DAT23 DAT[23] — — R[7] — — — — DIx_DISP_CLK PixCLK — DIx_PIN1 — May be required for anti-tearing DIx_PIN2 HSYNC — DIx_PIN3 VSYNC VSYNC out Table 66. Video Signal Cross-Reference (continued) i.MX 6Solo/6DualLite LCD Comment1,2 Port Name (x=0, 1) RGB, Signal Name (General) RGB/TV Signal Allocation (Example) 16-bit RGB 18-bit RGB 24 Bit RGB 8-bit YCrCb3 16-bit YCrCb 20-bit YCrCb |
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