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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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L9026 Fiches technique(PDF) 43 Page - STMicroelectronics |
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L9026 Fiches technique(HTML) 43 Page - STMicroelectronics |
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43 / 60 page  Field name Type Bit Offset Bit Width Reset Value Reset Sources Description OUTn RW 0 8 0x00 POR_N, NRES pin, CFG_1.RST bit, VDD_UV Channel [7:0], MSB refers to channel 7 0: (default) Output OFF 1: Output ON MAP_IN0 Register name: MAP_IN0 Address: Global Base Address + 0x07 Description: IN0 input mapping register Field name Type Bit Offset Bit Width Reset Value Reset Sources Description OUTn RW 0 8 0x04 OUT2 mapped on IN0 POR_N, NRES pin, CFG_1.RST bit, VDD_UV Channel [7:0], MSB refers to channel 7 0: OUTn not driven by IN0 1: OUTn driven by IN0 MAP_IN1 Register name: MAP_IN1 Address: Global Base Address + 0x08 Description: IN1 input mapping register Field name Type Bit Offset Bit Width Reset Value Reset Sources Description OUTn RW 0 8 0x08 OUT3 mapped on IN1 POR_N, NRES pin, CFG_1.RST bit, VDD_UV Channel [7:0], MSB refers to channel 7 0: OUTn not driven by IN1 1: OUTn driven by IN1 MAP_PWM Register name: MAP_PWM Address: Global Base Address + 0x09 Description: Internal PWM generator mapping register Field name Type Bit Offset Bit Width Reset Value Reset Sources Description OUTn RW 0 8 0x00 POR_N, NRES pin, CFG_1.RST bit, VDD_UV Channel [7:0], MSB refers to channel 7 0: OUTn not driven by internal PWM generator 1: OUTn driven by internal PWM generator PWM_SEL Register name: PWM_SEL Address: Global Base Address + 0x0A Description: Internal PWM generator selection register L9026 SPI register DS13397 - Rev 5 page 43/60 |
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