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L9026 Fiches technique(PDF) 18 Page - STMicroelectronics |
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L9026 Fiches technique(HTML) 18 Page - STMicroelectronics |
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18 / 60 page ![]() 6.12 Reset One of the following 4 conditions reset the SPI read/write registers to the default value: • VDDIO not present or below the undervoltage threshold VDDIO(UV) • IDLE pin is set to “low” with both INn “low" • A software reset (CFG_1.RST set to “1”) is commanded • NRES pin is asserted (only available in VFQFPN32 package option and configured to sense the pin status) When the SPI registers are reset, all channels (except 2,3) are switched OFF and the Input Mapping configuration is also reset. This means channels 2, 3 are still commanded by IN0, IN1 respectively. For functional safety register DIAG_OVC_OVT and STA_1. VDDIO_UV, STA_1.VBATT_UV bits are not cleared by a reset command. One of the following conditions resets the whole internal logic; • General internal supply failure (internal supply 3.3 V in UV or bandgap reference not correct) • VDDIO < VDDIO(UV) and IN1 = 0 and IN0 = 0 6.13 Power supply electrical specifications 3V ≤ VDDIO ≤ 5.5 V; 6 V ≤ VBATT ≤ 18 V; -40 °C ≤ Tj ≤ 150 °C unless otherwise specified. All voltages are referred to GND pin. Table 10. Power supply electrical parameters Parameter Description Test condition Min Typ Max Unit VBATT pin VBATT(UV_L) Analog supply undervoltage low threshold - 2.65 2.8 3 V VBATT(UV_H) Analog supply undervoltage high threshold - 2.7 2.85 3.1 V IVBATT(SLEEP) Analog supply current consumption in Sleep mode VIDLE = 0: VINn = 0; VDDIO = 5 V; TJ ≤ 85 °C - - 12 µA IVBATT(SLEEP) Analog supply current consumption in Sleep mode VIDLE = 0; VINn = 0; VDDIO = 5 V; TJ ≤ 175 °C - - 14 µA IVBATT(IDLE) Analog supply current consumption in Idle mode VIDLE = 5 V; VINn = 0; VDDIO = 5 V; fCLK = 0 MHz; CFG_1.ACT = 0B; PWM_SPI.OUTn = 0B; DIAG_OFF_EN.OUTn = 0B - - 20 mA IVBATT(IDLE_COR) Analog supply current consumption in Idle Mode with VBATT lower than VDDIO (device supplied by VDDIO) VIDLE = 5 V; VINn = 0; VDDIO = 5 V; fCLK = 0 MHz; CFG_1.ACT = 0B; PWM_SPI.OUTn = 0B; DIAG_OFF_EN.OUTn = 0B; VBATT = VDDIO - 1 V –0.1 - 0.1 mA IVBATT(ACTIVE) Analog supply current consumption in Active mode - channels OFF VIDLE = 5 V; VINn = 0; VDDIO = 5 V; fCLK = 0 MHz; CFG_1.ACT = 1B; PWM_SPI.OUTn = 0B; DIAG_OFF_EN.OUTn = 0B - 14 20 mA IVBATT(ACTIVE_COR) Analog supply current consumption in Active mode - channels OFF with VBATT lower than VDDIO (device supplied by VDDIO) VIDLE = 5 V; VINn = 0; VDDIO = 5 V; fCLK = 0 MHz; CFG_1.ACT = 1B; PWM_SPI.OUTn = 0B; DIAG_OFF_EN.OUTn = 0B; VBATT = VDDIO - 1 V 0 - 0.6 mA tVBATTUVFLT VBATT undervoltage filter Covered bySCAN 9 14 19 µs L9026 Reset DS13397 - Rev 5 page 18/60 |
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