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H5GQ2H24AFR-R0C Fiches technique(PDF) 111 Page - Hynix Semiconductor |
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H5GQ2H24AFR-R0C Fiches technique(HTML) 111 Page - Hynix Semiconductor |
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111 / 172 page ![]() This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsability for use of circuits described. No patent licenses are implied. Rev. 1.2 /Nov. 2011 111 H5GQ2H24AFR Table 27 Pin States During Self Refresh Pin State EDC High DQ/DBI# ODT ADR/CMD ODT CKE# ODT (Driven High by Controller) WCK/WCK# ODT |
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