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PCF2129 Fiches technique(PDF) 82 Page - NXP Semiconductors |
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PCF2129 Fiches technique(HTML) 82 Page - NXP Semiconductors |
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82 / 86 page ![]() PCF2129 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 7 — 19 December 2014 82 of 86 NXP Semiconductors PCF2129 Accurate RTC with integrated quartz crystal for industrial applications 25. Tables Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Table 2. Ordering options . . . . . . . . . . . . . . . . . . . . . . . . .2 Table 3. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2 Table 4. Pin description of PCF2129 . . . . . . . . . . . . . . . .5 Table 5. Register overview . . . . . . . . . . . . . . . . . . . . . . .8 Table 6. Control_1 - control and status register 1 (address 00h) bit allocation . . . . . . . . . . . . . . .10 Table 7. Control_1 - control and status register 1 (address 00h) bit description . . . . . . . . . . . . . .10 Table 8. Control_2 - control and status register 2 (address 01h) bit allocation . . . . . . . . . . . . . . . 11 Table 9. Control_2 - control and status register 2 (address 01h) bit description . . . . . . . . . . . . . . 11 Table 10. Control_3 - control and status register 3 (address 02h) bit allocation . . . . . . . . . . . . . . .12 Table 11. Control_3 - control and status register 3 (address 02h) bit description . . . . . . . . . . . . . .12 Table 12. CLKOUT_ctl - CLKOUT control register (address 0Fh) bit allocation . . . . . . . . . . . . . . .12 Table 13. CLKOUT_ctl - CLKOUT control register (address 0Fh) bit description . . . . . . . . . . . . . .12 Table 14. Temperature measurement period . . . . . . . . . .13 Table 15. CLKOUT frequency selection . . . . . . . . . . . . . .14 Table 16. Aging_offset - crystal aging offset register (address 19h) bit allocation . . . . . . . . . . . . . . .14 Table 17. Aging_offset - crystal aging offset register (address 19h) bit description . . . . . . . . . . . . . .14 Table 18. Frequency correction at 25 °C, typical . . . . . . .15 Table 19. Power management control bit description. . . .16 Table 20. Output pin BBS . . . . . . . . . . . . . . . . . . . . . . . . .21 Table 21. Seconds - seconds and clock integrity register (address 03h) bit allocation . . . . . . . . .25 Table 22. Seconds - seconds and clock integrity register (address 03h) bit description . . . . . . . .25 Table 23. Seconds coded in BCD format . . . . . . . . . . . .26 Table 24. Minutes - minutes register (address 04h) bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Table 25. Minutes - minutes register (address 04h) bit description . . . . . . . . . . . . . . . . . . . . . . . . . .26 Table 26. Hours - hours register (address 05h) bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Table 27. Hours - hours register (address 05h) bit description . . . . . . . . . . . . . . . . . . . . . . . . .27 Table 28. Days - days register (address 06h) bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Table 29. Days - days register (address 06h) bit description . . . . . . . . . . . . . . . . . . . . . . . . . .27 Table 30. Weekdays - weekdays register (address 07h) bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Table 31. Weekdays - weekdays register (address 07h) bit description . . . . . . . . . . . . . . . . . . . . . . . . . .28 Table 32. Weekday assignments . . . . . . . . . . . . . . . . . . .28 Table 33. Months - months register (address 08h) bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Table 34. Months - months register (address 08h) bit description . . . . . . . . . . . . . . . . . . . . . . . . . .29 Table 35. Month assignments in BCD format . . . . . . . . . 29 Table 36. Years - years register (address 09h) bit allocation . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 37. Years - years register (address 09h) bit description. . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 38. Second_alarm - second alarm register (address 0Ah) bit allocation . . . . . . . . . . . . . . 33 Table 39. Second_alarm - second alarm register (address 0Ah) bit description . . . . . . . . . . . . . . 33 Table 40. Minute_alarm - minute alarm register (address 0Bh) bit allocation . . . . . . . . . . . . . . 33 Table 41. Minute_alarm - minute alarm register (address 0Bh) bit description . . . . . . . . . . . . . . 33 Table 42. Hour_alarm - hour alarm register (address 0Ch) bit allocation . . . . . . . . . . . . . . 34 Table 43. Hour_alarm - hour alarm register (address 0Ch) bit description . . . . . . . . . . . . . 34 Table 44. Day_alarm - day alarm register (address 0Dh) bit allocation . . . . . . . . . . . . . . 34 Table 45. Day_alarm - day alarm register (address 0Dh) bit description . . . . . . . . . . . . . . 34 Table 46. Weekday_alarm - weekday alarm register (address 0Eh) bit allocation . . . . . . . . . . . . . . 35 Table 47. Weekday_alarm - weekday alarm register (address 0Eh) bit description . . . . . . . . . . . . . . 35 Table 48. Watchdg_tim_ctl - watchdog timer control register (address 10h) bit allocation . . . . . . . . 36 Table 49. Watchdg_tim_ctl - watchdog timer control register (address 10h) bit description . . . . . . . 36 Table 50. Watchdg_tim_val - watchdog timer value register (address 11h) bit allocation . . . . . . . . 36 Table 51. Watchdg_tim_val - watchdog timer value register (address 11h) bit description . . . . . . . . 36 Table 52. Programmable watchdog timer . . . . . . . . . . . . 37 Table 53. Flag location in register Control_2 . . . . . . . . . . 38 Table 54. Example values in register Control_2 . . . . . . . 39 Table 55. Example to clear only AF (bit 4) . . . . . . . . . . . . 39 Table 56. Example to clear only MSF (bit 7) . . . . . . . . . . 39 Table 57. Timestp_ctl - timestamp control register (address 12h) bit allocation . . . . . . . . . . . . . . . 41 Table 58. Timestp_ctl - timestamp control register (address 12h) bit description . . . . . . . . . . . . . . 41 Table 59. Sec_timestp - second timestamp register (address 13h) bit allocation . . . . . . . . . . . . . . . 41 Table 60. Sec_timestp - second timestamp register (address 13h) bit description . . . . . . . . . . . . . . 41 Table 61. Min_timestp - minute timestamp register (address 14h) bit allocation . . . . . . . . . . . . . . . 42 Table 62. Min_timestp - minute timestamp register (address 14h) bit description . . . . . . . . . . . . . . 42 Table 63. Hour_timestp - hour timestamp register (address 15h) bit allocation . . . . . . . . . . . . . . . 42 Table 64. Hour_timestp - hour timestamp register (address 15h) bit description . . . . . . . . . . . . . . 42 Table 65. Day_timestp - day timestamp register (address 16h) bit allocation . . . . . . . . . . . . . . . 43 |
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