PCF2129 datasheet(60/86 Pages) PHILIPS

60 / 86 page

PCF2129

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Product data sheet

Rev. 7 — 19 December 2014

60 of 86

NXP Semiconductors

PCF2129

Accurate RTC with integrated quartz crystal for industrial applications

[1]

For reliable oscillator start-up at power-on: VDD(po)min =VDD(min) +0.3 V.

[2]

Timer source clock = 1⁄60 Hz, level of pins SDA/CE, SDI, and SCL is VDD or VSS.

[3]

When the device is supplied by the VBAT pin instead of the VDD pin, the current values for IBAT are as specified for IDD under the same

conditions.

[4]

The I2C-bus and SPI-bus interfaces of PCF2129 are 5 V tolerant.

[5]

Tested on sample basis.

[6]

For further information, see Figure 40.

Power management

Vth(sw)bat

battery switch threshold

voltage

-2.5

-V

Vth(bat)low

low battery threshold

voltage

-2.5

-V

Tamb =25 C

2.25

2.85

Inputs[4]

input voltage

0.5

VDD +0.5

VIL

LOW-level input voltage

0.25VDD

Tamb = 20 C to +85 C;

VDD > 2.0 V

0.3VDD

VIH

HIGH-level input voltage

0.7VDD

ILI

input leakage current

VI =VDD or VSS

-0

A

post ESD event

1-

A

input capacitance

[5] --

Outputs

output voltage

on pins CLKOUT, INT,

referring to external pull-up

0.5

+5.5

on pin BBS

1.8

4.2

on pin SDO

0.5

VDD + 0.5

VOH

HIGH output voltage

on pin SDO

0.8VDD

-VDD

VOL

LOW output voltage

on pins CLKOUT, INT, and

SDO

VSS

-0.2VDD

IOL

LOW-level output current

output sink current;

VOL = 0.4 V

on pin SDA/CE

[6] 317

on all other outputs

1.0

IOH

HIGH-level output current

output source current;

on pin SDO;

VOH = 3.8 V;

VDD = 4.2 V

1.0

ILO

output leakage current

VO = VDD or VSS

-0

A

post ESD event

1-

A

Table 79.

Static characteristics …continued

VDD = 1.8 V to 4.2 V; VSS =0V; Tamb = 40 C to +85 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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