AM652X datasheet(205/277 Pages) TI1

205 / 277 page

SPI_CS[x]

(IN)

SPI_SCLK

(IN)

SPI_SCLK

(IN)

SPI_D[x]

(IN)

SPI_CS[x]

(IN)

SPI_SCLK

(IN)

SPI_SCLK

(IN)

SPI_D[x]

(IN)

Bit n-1

Bit n-2

Bit n-3

Bit n-4

Bit 0

Bit n-1

Bit n-2

Bit n-3

Bit 1

Bit 0

PHA=0

EPOL=1

POL=0

POL=1

POL=0

POL=1

PHA=1

EPOL=1

SS3

SS1

SS3

SS1

SS3

SS1

SS2

SS1

SS8

SS9

SS8

SS9

SS2

SS3

SS2

SS4

SS5

SS4

SS5

SS4

SS5

SPRSP08_TIMING_McSPI_04

205

AM6548, AM6528, AM6546

AM6526, AM6527

www.ti.com

SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019

Submit Documentation Feedback

Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527

Specifications

(1) This timing applies to all configurations regardless of SPI_CLK polarity and which clock edges are used to drive output data and capture

input data.

(2) P = SPICLK period.

(3) PHA = 0; SPI_CLK phase is programmable with the PHA bit of the SPI_CH(i)CONF register.

Figure 5-68. SPI Slave Mode Receive Timing

AM652X Fiches technique(PDF) 205 Page - Texas Instruments

AM652X Fiches technique(HTML) 205 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Fiches technique Télécharger

Lien URL