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AM186ED Fiches technique(PDF) 2 Page - Advanced Micro Devices |
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AM186ED Fiches technique(HTML) 2 Page - Advanced Micro Devices |
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2 / 88 page ![]() 2 Am186ED/EDLV Microcontrollers PREL IMINAR Y D RA F T Am186ED/EDLV MICROCONTROLLERS BLOCK DIAGRAM Notes: *All PIO signals are shared with other physical pins. See the pin descriptions beginning on page 21 and Table 2 on page 29 for information on shared functions. ** RTS1/RTR1 and CTS1/ENRX1 are multiplexed with PCS3 and PCS2, respectively. See the pin descriptions beginning on page 21. S1–S0 Interrupt Control Unit Timer Control Unit DMA Unit Bus Interface Unit Execution Unit Chip-Select Unit Clock and Power Management Unit Control Registers 16-Bit Count Registers Max Count A Registers 16-Bit Count Registers 20-Bit Destination Pointers 20-Bit Source Pointers Control Registers Control Registers Control Registers 01 2 0 1 Max Count B Registers Refresh Control Unit Control Registers Control Registers Control Registers CLKOUTB CLKOUTA INT6–INT4** INT3/INTA1/IRQ INT2/INTA0/PWD** INT1/SELECT INT0 TMROUT0 TMROUT1 DRQ0/INT5** DRQ1/INT6** VCC GND TMRIN0 TMRIN1 ARDY SRDY DT/R DEN/DS HOLD HLDA Asynchronous Serial Port 0 TXD0 RXD0 NMI A19–A0 AD15–AD0 ALE BHE/ADEN WR WLB WHB RD RES LCS/ONCE0/RAS0 MCS2/LCAS PCS6/A2 PCS3–PCS0** PCS5/A1 UCS/ONCE1 X2 X1 MCS3/RAS1 PIO Unit PIO31– PIO0* S6/CLKDIV2 UZI TXD1 RXD1 CTS0/ENRX0 CTS1/ENRX1** RTS0/RTR0 RTS1/RTR1** Watchdog Timer (WDT) Pulse Width Demod- ulator (PWD) PWD** Asynchronous Serial Port 1 MCS1/UCAS S2/BTSEL DRAM Control Unit MCS0 |
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