PC87415VCG datasheet(40/42 Pages) NSC

40 / 42 page

90 Application Information (Continued)

The GAL monitors the interrupts that are causing INTA

be asserted If multiple of these interrupt requests are as-

serted then every time one of these requests negates a 10

Clock (PCI CLOCK) negation pulse is produced on the

INTA

pin This gives an edge for each interrupt request

and has been shown to work with PC motherboards that do

not work properly with PCI level sensitive Interrupts Note

INTA

will stay negated if no more interrupt requests are

pending

93 DMA BUS MASTER CONTROL AND STATUS

This is a minor errata that relates to the DMA Bus Master

Control and Status Register offset from the PCI Configura-

tion Space Base Address Register

For Channel

1 the registers offset 00H and 02H from

BAR4

For Channel

2 the registers offset 08H and 0AH from

BAR4

The Registers 02H and 0AH (bits 1 and 2) are the Channel 1

and 2 Error and Interrupt bits respectively Both these bits

should be cleared when writing a ‘‘1’’ to the particular bit or

bits

Note

THE RESETTING OF THESE TWO BITS HAVE BEEN ERRONE-

OUSLY CODED IN THE PC87415 DESIGN

Instead to reset bits 1 or 2 in register 02H (or 0AH) the user

must write a ‘‘1’’ in bits 1 or 2 of register 00H (or 08H)

In other words to reset these two bits ‘0000 0006’ should

be written instead of ‘0006 0000’ The reset bits (bit 1 and

bit 2) are reserved bits which are not being used in the

PC87415 design and as such this should not affect other

functionality of the device

This software modification is included in all the drivers

supplied by National Semiconductor for use with the

PC87415

100 Errata

101 TARGET MODE

a In response to an illegal CBE combination during access

from another Master the device generates STOP and a

Target Abort but does not generate DEVSEL

Ordering Code Information

(a) Device

TLF12497 – 37

(b) Software Drivers

PC87415-SWA set of discs with software drives for

- DOS

- Windows 3x

- Windows 95

- Windows NT

- OS-2

- Netware

- SCO Unix

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