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USB3250 Fiches technique(PDF) 5 Page - Microchip Technology |
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USB3250 Fiches technique(HTML) 5 Page - Microchip Technology |
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5 / 46 page ![]() 2013 - 2016 Microchip Technology Inc. DS00002142A-page 5 USB3250 2.0 FUNCTIONAL BLOCK DIAGRAM FIGURE 2-1: BLOCK DIAGRAM Note: See Section 7.1, "Modes of Operation," on page 19 for a description of the digital interface. VALIDH PWR CONTROL FS SE+ RX TX State Machine Parallel to Serial Conversion Bit Stuff NRZ Encode TX LOGIC Clock Recovery Unit Clock and Data Recovery Elasticity Buffer VP VM BIASING Bandgap Voltage Reference Current Reference PLL and XTAL OSC System Clocking FS RX FS SE- HS RX HS SQ RX State Machine Serial to Parallel Conversion Bit Unstuff NRZI Decode RX LOGIC DM TX 1.5k FS TX HS TX HS_DATA HS_CS_ENABLE HS_DRIVE_ENABLE OEB VMO VPO RPU_EN DP RXVALID RXACTIVE RXERROR TXREADY RESET SUSPENDN XCVRSELECT TERMSELECT OPMODE[1:0] LINESTATE[1:0] CLKOUT TXVALID DATABUS16_8 DATA[15:0] * |
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