USB3250 datasheet(4/46 Pages) MICROCHIP

4 / 46 page

USB3250

DS00002142A-page 4

 2013 - 2016 Microchip Technology Inc.

1.0

GENERAL DESCRIPTION

The USB3250 provides the Physical Layer (PHY) interface to a USB 2.0 Device Controller. The IC is available in a 56-

pin VQFN.

The USB3250 is a USB 2.0 physical layer transceiver (PHY) integrated circuit. Microchip's proprietary technology

results in low power dissipation, which is ideal for building a bus powered USB 2.0 peripheral. The PHY can be config-

ured for either an 8-bit unidirectional or a 16-bit bidirectional parallel interface, which complies with the USB Transceiver

Macrocell Interface (UTMI) specification. It supports 480Mbps transfer rate, while remaining backward compatible with

USB 1.1 legacy protocol at 12Mbps.

All required termination for the USB 2.0 Transceiver is internal. Internal 5.25V short circuit protection of DP and DM lines

is provided for USB compliance.

While transmitting data, the PHY serializes data and generates SYNC and EOP fields. It also performs needed bit stuff-

ing and NRZI encoding. Likewise, while receiving data, the PHY de-serializes incoming data, stripping SYNC and EOP

fields and performs bit un-stuffing and NRZI decoding.

USB3250 Fiches technique(PDF) 4 Page - Microchip Technology