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STM32F745ZE Fiches technique(PDF) 23 Page - STMicroelectronics |
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STM32F745ZE Fiches technique(HTML) 23 Page - STMicroelectronics |
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23 / 227 page ![]() DocID027590 Rev 4 23/227 STM32F745xx STM32F746xx Functional overview 44 2.15 Boot modes At startup, the boot memory space is selected by the BOOT pin and BOOT_ADDx option bytes, allowing to program any boot memory address from 0x0000 0000 to 0x3FFF FFFF which includes: • All Flash address space mapped on ITCM or AXIM interface • All RAM address space: ITCM, DTCM RAMs and SRAMs mapped on AXIM interface • The System memory bootloader The boot loader is located in system memory. It is used to reprogram the Flash memory through a serial interface. 2.16 Power supply schemes • VBAT = 1.65 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup registers (through power switch) when VDD is not present. • VDD = 1.7 to 3.6 Vexternal power supply for I/Os and the internal regulator (when enabled), provided externally through VDD pins. • VSSA, VDDA = 1.7 to 3.6 V: external analog power supplies for ADC, DAC, reset blocks, RCs and PLL. VDDA and VSSA must be connected to VDD and VSS, respectively. Note: VDD/VDDA minimum value of 1.7 V is obtained when the internal reset is OFF (refer to Section 2.17.2: Internal reset OFF). Refer to Table 3: Voltage regulator configuration mode versus device operating mode to identify the packages supporting this option. • VDDUSB can be connected either to VDD or an external independent power supply (3.0 to 3.6V) for USB transceivers (refer to Figure 4 and Figure 5). For example, when device is powered at 1.8V, an independent power supply 3.3V can be connected to VDDUSB. When the VDDUSB is connected to a separated power supply, it is independent from VDD or VDDA but it must be the last supply to be provided and the first to disappear. The following conditions VDDUSB must be respected: – During power-on phase (VDD < VDD_MIN), VDDUSB should be always lower than VDD – During power-down phase (VDD < VDD_MIN), VDDUSB should be always lower than VDD –VDDSUB rising and falling time rate specifications must be respected (see Table 20 and Table 21) – In operating mode phase, VDDUSB could be lower or higher than VDD: - If USB (USB OTG_HS/OTG_FS) is used, the associated GPIOs powered by VDDUSB are operating between VDDUSB_MIN and VDDUSB_MAX. - The VDDUSB supply both USB transceiver (USB OTG_HS and USB OTG_FS). If only one USB transceiver is used in the application, the GPIOs associated to the other USB transceiver are still supplied by VDDUSB. - If USB (USB OTG_HS/OTG_FS) is not used, the associated GPIOs powered by VDDUSB are operating between VDD_MIN and VDD_MAX. |
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