Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

Preview PDF HTML

STM32F745ZE Fiches technique(PDF) 192 Page - STMicroelectronics

No de pièce STM32F745ZE
Description  ARM-based Cortex-M7 32b MCUFPU, 462DMIPS, up to 1MB Flash/32016 4KB RAM, USB OTG HS/FS, ethernet, 18 TIMs, 3 ADCs, 25 com itf, cam & LCD
PDF  227 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F745ZE Fiches technique(HTML) 192 Page - STMicroelectronics

Back Button STM32F745ZE Datasheet HTML 188Page - STMicroelectronics STM32F745ZE Datasheet HTML 189Page - STMicroelectronics STM32F745ZE Datasheet HTML 190Page - STMicroelectronics STM32F745ZE Datasheet HTML 191Page - STMicroelectronics STM32F745ZE Datasheet HTML 192Page - STMicroelectronics STM32F745ZE Datasheet HTML 193Page - STMicroelectronics STM32F745ZE Datasheet HTML 194Page - STMicroelectronics STM32F745ZE Datasheet HTML 195Page - STMicroelectronics STM32F745ZE Datasheet HTML 196Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 192 / 227 page
background image
Electrical characteristics
STM32F745xx STM32F746xx
192/227
DocID027590 Rev 4
Figure 74. DCMI timing diagram
5.3.30
LCD-TFT controller (LTDC) characteristics
Unless otherwise specified, the parameters given in
Table 109 for LCD-TFT are derived
from tests
performed under the ambient temperature, fHCLK frequency and VDD supply
voltage summarized in Table 17, with the following configuration:
•
LCD_CLK polarity: high
•
LCD_DE polarity : low
•
LCD_VSYNC and LCD_HSYNC polarity: high
•
Pixel formats: 24 bits
Table 109. LTDC characteristics (1)
1. Guaranteed by characterization results.
Symbol
ParameterMin
Max
Unit
fCLK
LTDC clock output frequency
-
45
MHz
DCLK
LTDC clock output duty cycle
45
55
%
tw(CLKH)
tw(CLKL)
Clock High time, low time
tw(CLK)/2
− 0.5 tw(CLK)/2+0.5
ns
tv(DATA)
Data output valid time
-
6
th(DATA)
Data output hold time
2
-
tv(HSYNC)
HSYNC/VSYNC/DE output valid
time
-3
tv(VSYNC)
tv(DE)
th(HSYNC)
HSYNC/VSYNC/DE output hold
time
0.5
-
th(VSYNC)
th(DE)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Fiches technique Télécharger

Go To PDF Page


Lien URL



ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Lien vers la fiche technique    |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com