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STM32F745ZE Fiches technique(PDF) 175 Page - STMicroelectronics

No de pièce STM32F745ZE
Description  ARM-based Cortex-M7 32b MCUFPU, 462DMIPS, up to 1MB Flash/32016 4KB RAM, USB OTG HS/FS, ethernet, 18 TIMs, 3 ADCs, 25 com itf, cam & LCD
PDF  227 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F745ZE Fiches technique(HTML) 175 Page - STMicroelectronics

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STM32F745xx STM32F746xx
Electrical characteristics
195
Figure 61. Asynchronous multiplexed PSRAM/NOR write waveforms
Table 94. Asynchronous multiplexed PSRAM/NOR write timings(1)
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
4THCLK−0.5 4THCLK+1.5
ns
tv(NWE_NE)
FMC_NEx low to FMC_NWE low
THCLK−1THCLK+0.5
tw(NWE)
FMC_NWE low time
2THCLK−0.5 2THCLK+0.5
th(NE_NWE)
FMC_NWE high to FMC_NE high hold time
THCLK
-
tv(A_NE)
FMC_NEx low to FMC_A valid
-
0
tv(NADV_NE)
FMC_NEx low to FMC_NADV low
0
0.5
tw(NADV)
FMC_NADV low time
THCLK−0.5
THCLK+ 1.5
th(AD_NADV)
FMC_AD(adress) valid hold time after
FMC_NADV high)
THCLK−2-
th(A_NWE)
Address hold time after FMC_NWE high
THCLK
-
th(BL_NWE)
FMC_BL hold time after FMC_NWE high
THCLK−2-
tv(BL_NE)
FMC_NEx low to FMC_BL valid
-
0
tv(Data_NADV)
FMC_NADV high to Data valid
-
THCLK +2
th(Data_NWE)
Data hold time after FMC_NWE high
THCLK +0.5
-



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