ST-PLC-AFE datasheet(38/58 Pages) STMICROELECTRONICS

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System timings and interruptions

ST-PLC-AFE

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The analog front end needs t_startup to bias the external capacitors correctly. This period of

time lasts 50 µs, but it can vary depending on external capacitors values.

9.3

Interruptions

The interrupt pin (INT) can be used to warn the microprocessor/DSP of unusual operating

conditions. The INT pin can be triggered by two external circuit conditions, depending on the

enable register settings. The ST-PLC-AFE can be programmed to issue an interrupt on

current or thermal overload.

9.3.1

Overcurrent condition

The maximum output current allowed from the PA can be programmed using the SPI

communication system (CL<1:0> bit in the Gain register). If a FAULT condition occurs and

causes an overcurrent, the PA goes into current limitation and the OVC_FLAG bit (in the

Status register) changes to 1.

The OVC_FLAG bit remains set to 1 even after the device returns to normal operation. It

can be reset when the microprocessor writes 0 inside the Status register. It can also be set

back to 0 through a system reset using the RST_SPI bit in the Enable register.

This configuration results in the presence of an interrupt signal at the INT pin. The INT

signal returns to 0 when the device returns to normal operation. The latency time between

the interrupt and the INT change of state tINT_OVC_UP and tINT_OVC_DOWN is 1 µs.

Figure 38. Overcurrent event

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