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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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ST-PLC-AFE Fiches technique(PDF) 32 Page - STMicroelectronics |
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ST-PLC-AFE Fiches technique(HTML) 32 Page - STMicroelectronics |
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32 / 58 page  Powering the device and resetting the SPI and registers ST-PLC-AFE 32/58 DocID028727 Rev 1 7.4 Use of an external DAC Figure 16. Register access with an external DAC The Data register is used to update the DAC output. It is programmed directly by the SPI at address 000h. Data are transferred to the DAC at the rising edge of DAC_CLK pin which triggers the start of a conversion. The DAC_CLK pin must be supplied with a stable, low-jitter, clock signal at the required sample frequency. The SCLK and DAC_CLK pins can be completely asynchronous, but SCLK must be more than 16 times the frequency of the DAC_CLK pin to ensure that the Data register is updated with a new sample between each DAC_CLK pulse. |
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