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PD16640C Fiches technique(PDF) 12 Page - Renesas Technology Corp

No de pièce PD16640C
Description  300/309-OUTPUT TFT-LCD SOURCE DRIVER (64 GRAY SCALE)
PDF  18 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

PD16640C Fiches technique(HTML) 12 Page - Renesas Technology Corp

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Data Sheet S11269EJ1V1DS00
10
µµµµ PD16640C
Electrical Characteristics (TA = –10 to +75
°C, VDD1 = 3.3 V ±±±± 0.3 V, VDD2 = 3.3 V ±±±± 0.3 V or 5.0 V ±±±± 0.5 V,
VSS1 = VSS2 = 0 V)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Input leakage current
IIL
D00-D05, D10-D15, D20-D25,
R,/L, STB
±1.0
µ A
Pull-up resistor
RPU
VDD1 = 3.3 V, Osel, Vsel
40
100
250
k
Ω
High-level output voltage
VOH
STHR(STHL),IO=
−1.0 mA
VDD1
− 0.5
V
Low-level output voltage
VOL
STHR(STHL),IO=+1.0 mA
0.5
V
Static current consumption of
Ivn1
VDD1=3.3 V
V0-V1
105
210
420
µ A
γ -corrected supply current
Vn
−Vn+1=0.5 V
V1-V2
56
113
226
µ A
(VDD2 = 3.3 V or 5.0 V)
V2-V3
41
82
164
µ A
V3-V4
70
140
280
µ A
V4-V5
117
234
468
µ A
V5-V6
124
248
496
µ A
V6-V7
156
313
626
µ A
V7-V8
124
248
496
µ A
V8-V9
74
149
298
µ A
V9-V10
99
198
396
µ A
Driver output current
(VDD2 = 3.3 V)
IVOH1
VOUT=2.7 V, Vx=3.2 V
Note1
VDD1=VDD2=3.3 V
−0.16
−0.08
mA
IVOL1
VOUT=0.6 V, Vx=0.1 V
Note1
VDD1=VDD2=3.3 V
0.07
0.14
mA
Driver output current
(VDD2 = 5.0 V)
IVOH2
VOUT=4.4 V, Vx=4.9 V
Note1
VDD1=3.3 V, VDD2=5.0 V
−0.24
−0.12
mA
IVOL2
VOUT=0.6 V, Vx=0.1 V
Note1
VDD1=3.3 V, VDD2=5.0 V
0.10
0.20
mA
Output voltage deviation
∆VO
VDD1=3.3 V,
VDD2=3.3 V or 5.0 V,
VOUT= 0.5 V,1.5 V, 2.5 V
Note1
±10
±20
mV
Output voltage deviation
∆VP-P
Input data
±5mV
Output voltage range
VO
Input data : 00H to 3FH
VSS2 + 0.1
VDD2
− 0.1
V
Dynamic logic current
consumption
IDD1
No load
Note2
0.5
2.5
mA
Dynamic driver current
consumption
IDD21
No load, VDD2=3.3 V
Note2
3.0
10
mA
IDD22
No load, VDD2=5.0 V
Note2
3.0
10
mA
Notes 1. VX is output voltage of analog output pins S1 to S309.
VOUT is the voltage applied to analog output pins S1 to S309.
2. The STB cycle is specified at 31
µ s and fCLK = 16 MHz.



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