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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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PM0073 Fiches technique(PDF) 18 Page - STMicroelectronics |
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PM0073 Fiches technique(HTML) 18 Page - STMicroelectronics |
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18 / 34 page  Reading/programming the STM32Wxxx embedded Flash memory PM0073 18/34 Doc ID 17766 Rev 5 2.2.5 Option byte programming The option bytes are programmed differently from normal user addresses. The number of option bytes is limited to 8 (4 for write protection, 1 for read protection, 1 for configuration and 2 for user data storage). Wireless line devices do not use the configuration byte nor the 2 user data bytes and all of them are marked as reserved; furthermore, some bytes are used for customer specific data that can be programmed with a similar procedure as the option bytes, but with the PG bit set instead of the OPTPG bit in the FLASH_CR register. After unlocking the FPEC, the user has to authorize the programming of the option bytes by writing the same set of KEYS (KEY1 and KEY2) to the FLASH_OPTKEYR register to set the OPTWRE bit in the FLASH_CR register (refer to Section 2.2.1: Key values for key values). Then the user has to set the OPTPG bit in the FLASH_CR register and perform a half-word write operation at the desired Flash address. FPEC preliminarily reads the value of the addressed option byte and checks that it has been erased. If not, the program operation is skipped and a warning is issued by the WRPRTERR bit in the FLASH_SR register. The end of the program operation is indicated by the EOP bit in the FLASH_SR register. The FPEC takes the LSB and automatically computes the MSB (which is the complement of the LSB) and starts the programming operation. This guarantees that the option byte and its complement are always correct. The sequence is as follows: 1. Enable the FPEC clock. 2. Check that no Flash memory operation is ongoing by checking the BSY bit in the FLASH_SR register. 3. Unlock the OPTWRE bit in the FLASH_CR register. 4. Set the OPTPG bit in the FLASH_CR register. 5. Write the data (half-word) to the desired address. 6. Wait for the BSY bit to be reset. 7. Read the programmed value and verify. When the Flash memory read protection option is changed from protected to unprotected, a Mass Erase of the main Flash memory is performed before reprogramming the read protection option. If the user wants to change an option other than the read protection option, then the mass erase is not performed. The erased state of the read protection option byte protects the Flash memory. When programming the customer specific data of a wireless line device, the FPEC does not perform the complement operations and these areas can be programmed with any value by the user. The sequence to program customer-specific data is as follows: 1. Enable the FPEC clock. 2. Check that no Flash memory operation is ongoing by checking the BSY bit in the FLASH_SR register. 3. Unlock the OPTWRE bit in the FLASH_CR register. 4. Set the PG bit in the FLASH_CR register. 5. Write the data (half_word) to the desired address. 6. Wait for the BSY bit to be reset. 7. Read the programmed value and verify. |
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