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AN3137 Fiches technique(PDF) 28 Page - STMicroelectronics |
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AN3137 Fiches technique(HTML) 28 Page - STMicroelectronics |
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28 / 42 page ![]() Methods for precision improvement AN3137 28/42 Doc ID 16983 Rev 3 Figure 15. ADC input pin noise spikes from internal charge during sampling process Note that a non-zero external capacitance Cext (parasitic pin capacitance) also exists, so during conversion time the pin capacitance is discharged through source impedance Rin. 4.4.3 Minimizing added errors Workaround for high impedance sources To solve the added error problem, you can increase the sampling time (tS) configuring ADC settings in MCU firmware, so that you discharge the Csh charge through the source impedance Rin. The time constant (Rin * Csh) is the reference for choosing the sampling time. To choose the sampling time cycles, use this formula (see also Section 1): The clock for ADC (fADC) is another important factor; slowing down the ADC clock increases the sampling time. t S f ADC R in C sh ⋅ () In 4096 0.5 ------------- ⋅⋅ ≥ cycles [] |
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