AN3137 datasheet(14/42 Pages) STMICROELECTRONICS

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STM8L/STM8AL ADC usage/programming

AN3137

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Doc ID 16983 Rev 3

2.2

Conversion modes

The ADC can operate in different modes depending on application requirements. The

following sections list the most commonly used operating modes.

2.2.1

Single conversion

This conversion mode is usually used when the application needs to read occasionally

some analog values (input voltage, temperature...).

2.2.2

Single conversion with trigger

This mode is used for the same applications as for the single conversion described in

Section 2.2.1 but the conversion start is triggered by a periodical interval or by an external

event (collection of equidistant samples, external event measurement...).

2.2.3

One-shot channel sequence scan

This mode is a single scan mode (see Section 2.1.3). It is useful for collecting values from a

sequence of channels in one time, for example, measuring a set of external sensors within

equidistant intervals and storing them into a log file (measuring a set of sensors in one

time). This mode can be combined with any trigger depending on application needs:

software, timer or external trigger.

2.2.4

Continuous channel sequence scan

This mode continuously converts selected channels and stores data into memory. As the

DMA is used, the CPU does not need to manage measurements, it only processes the data:

it displays them and sends them to the communication line. This scan mode uses

continuous scan mode. Refer to Section 2.1.3.

2.3

Specific modes using ADC features

2.3.1

Analog watchdog monitoring

By default, the ADC runs in continuous mode and the analog watchdog (enabled on one

channel) monitors the converted values that are outside the reference voltage range defined

in the ADC_HTRx and ADC_LTRx threshold registers). If the value becomes “insecure”,

then an interrupt occurs and the AWD flag bit is set.

In this mode, the CPU does not need to perform periodical ADC measurements. It only has

to react on analog watchdog interrupts (there is no performance loss due to the ADC

operation).

This mode is selected by setting a channel for the analog watchdog monitoring in the

ADC_CR3 register (CHSEL bits). The detection of insecure values can be performed by

monitoring the AWD bit (in the ADC_SR register) or by using the automatic interrupt through

the analog watchdog (AWDIE bit set in ADC_CR1 register to enable interrupts).

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