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AN4240 Fiches technique(PDF) 13 Page - STMicroelectronics

No de pièce AN4240
Description  This application note provides an easy introduction to the usage
PDF  30 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4240 Fiches technique(HTML) 13 Page - STMicroelectronics

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13/30
AN4240
Application code structure
5
Application code structure
This section gives an overview of the application code implemented to test some CSE
features as the encryption/decryption using ECB and CBC cipher modes and an example
code in order to release a Secure Boot loading some cryptographic keys in the secure slots.
5.1
Peripherals and tools used
Device: SPC564xB/C
Compiler: GHS v6.1
Debugger: Lauterbach
System clock: 120 MHz by PLL initialization
CGM (Clock Generation Module): PLL is configured as system clock
CSE module
ME: Mode entry in order to configure the Magic Carpet
SWT: Software Watchdog in order to disable the periodic reset
5.2
Code Implementation
In order to load the cryptographic keys in the secure flash of the device, to release a secure
boot and then start the demo application, three different GHS projects are implemented.
First project is needed to load the cryptographic keys obtained off line, using an executable
file precompiled in order to obtain all the five “M” parameters and the 2 K parameters to
generate 10 user Crypto Keys, BOOT_MAC_KEY and MASTER_ECU_KEY. For more
information read the Appendix A at the end of this document.
Second project is used to release a Secure Boot OK, adding in the start up file and in the
locator file, few lines of code and implementing the Secure Boot Procedure as describe in
Figure 5.
Third project is the demo application code which shows the main differences between the
ECB and CBC cipher mode, as described in the previous paragraph.
The first application code configures the device in order to have the following:
Basic configuration procedure:
Disable Software Watchdog
Initialize Magic Carpet
initialize PLL to 120 MHz from 40 MHz of the external oscillator
Initialization of the CSE module
Updating a blank sample and loading the cryptographic keys into the secure flash
Issue a Get UID command
Issue a LOAD KEY command



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