ADE7166_15 datasheet(29/152 Pages) AD

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ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569

Rev. B | Page 29 of

152

POWER MANAGEMENT

The ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/

ADE7569 have elaborate power management circuitry that

manages the switchover from regular power supply to battery

and manages power supply failures. The power management

functionalities can be accessed directly through the 8052 SFRs

(see Table 16).

Table 16. Power Management SFRs

SFR Address

R/W

Mnemonic

Description

0xEC

R/W

IPSME

Power management interrupt enable (see Table 21).

0xF5

R/W

BATPR

Battery switchover configuration (see Table 19).

0xF8

R/W

IPSMF

Power management interrupt flag (see Table 18).

0xFF

R/W

INTPR

Interrupt pins configuration (see Table 17).

0xF4

R/W

PERIPH

Peripheral configuration (see Table 20).

0xC5

R/W

POWCON

Power control (see Table 26).

0xFB

R/W

SCRATCH1

Scratch Pad 1 (see Table 22).

0xFC

R/W

SCRATCH2

Scratch Pad 2 (see Table 23).

0xFD

R/W

SCRATCH3

Scratch Pad 3 (see Table 24).

0xFE

R/W

SCRATCH4

Scratch Pad 4 (see Table 25).

POWER MANAGEMENT REGISTER DETAILS

Table 17. Interrupt Pins Configuration SFR (INTPR, Address 0xFF)

Bit

Mnemonic

Default

Description

RTCCAL

Controls RTC calibration output. When set, the RTC calibration frequency selected by the FSEL bits is

output on the P0.2/CF1/RTCCAL pin.

[6:5]

FSEL

Sets RTC calibration output frequency and calibration window.

FSEL

Result (Calibration Window, Frequency)

30.5 sec, 1 Hz

30.5 sec, 512 Hz

0.244 sec, 500 Hz

0.244 sec, 16 kHz

Reserved

N/A

[3:1]

INT1PRG

000

Controls the function of INT1.

INT1PRG

Result

X00

GPIO enabled

X01

BCTRL enabled

01X

INT1 input disabled

11X

INT1 input enabled

INT0PRG

Controls the function of INT0.

INT0PRG

Result

INT0 input disabled

INT0 input enabled

Writing to the Interrupt Pins Configuration SFR (INTPR, Address 0xFF)

To protect the RTC from runaway code, a key must be written to the key SFR (KYREG, Address 0xC1) to obtain write access to INTPR.

KYREG (see Table 126) should be set to 0xEA to unlock this SFR and reset to 0 after a timekeeping register is written to. The RTC

registers can be written using the following 8052 assembly code:

MOV

KYREG, #0EAh

MOV

INTPR, #080h

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