ADE7166_15 datasheet(21/152 Pages) AD

21 / 152 page

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569

Rev. B | Page 21 of

152

Pin No.

Mnemonic

Description

VINTA

This pin provides access to the on-chip 2.5 V analog LDO. No external active circuitry should be connected to

this pin. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.

VDD

3.3 V Power Supply Input from the Regulator. This pin is connected internally to VSWOUT when the regulator is

selected as the power supply for the ADE7116/ADE7156/ADE7166/ADE7169. This pin should be decoupled

with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.

VSWOUT

3.3 V Power Supply Output. This pin provides the supply voltage for the LDOs and internal circuitry of the

ADE7116/ADE7156/ADE7166/ADE7169. This pin should be decoupled with a 10 μF capacitor in parallel with

a ceramic 100 nF capacitor.

VINTD

This pin provides access to the on-chip 2.5 V digital LDO. No external active circuitry should be connected to

this pin. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.

DGND

Ground Reference for Digital Circuitry.

VDCIN

Analog Input for DC Voltage Monitoring. The maximum input voltage on this pin is VSWOUT with respect to

AGND. This pin is used to monitor the preregulated dc voltage.

Exposed Pad

The exposed pad on the bottom of the LFCSP enhances thermal performance and is electrically connected

to ground inside the package. It is recommended that the exposed pad be connected to the ground plane

on the board.

ADE7166 Fiches technique(PDF) 21 Page - Analog Devices