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AMTP32M Fiches technique(PDF) 26 Page - Aplus Intergrated Circuits |
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AMTP32M Fiches technique(HTML) 26 Page - Aplus Intergrated Circuits |
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26 / 30 page ![]() Integrated Circuits Inc. aMTPxxM Series Ver 1.1 26/30 12/16/2014 CPU Serial Mode Using 3.3V Supply And CPU Serial Trigger With DAC Driver Speaker Note 1. PB0 is serial clock pin (input). 2. PB1 is serial data pin (input). 3. PD0 is busy pin (output). 4. C1, C2 and C3 must be connected directly on the VDD, VDDA, VDDB and VSS, VSSA, VSSB pins of the chip. |
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