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AD7730LBR Fiches technique(PDF) 44 Page - Analog Devices |
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AD7730LBR Fiches technique(HTML) 44 Page - Analog Devices |
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44 / 52 page ![]() LOW POWER BRIDGE TRANSDUCER ADC KEY FEATURES Resolution of 110,000 Counts (Peak-to-Peak) Power Consumption: 15 mW typ Offset Drift: < 1 ppm/ C Gain Drift: 3 ppm/ C Line Frequency Rejection: >150 dB Buffered Differential Inputs Programmable Filter Cutoffs Specified for Drift Over Time Operates with Reference Voltages of 1 V to 5 V ADDITIONAL FEATURES Two-Channel Programmable Gain Front End On-Chip DAC for Offset/TARE Removal FASTStep Mode AC or DC Excitation Single Supply Operation APPLICATIONS Portable Weigh Scales FUNCTIONAL BLOCK DIAGRAM *Protected by U.S. Patent No: 5, 134, 401. Other Patent Applications Filed. a APPENDIX–AD7730L* –44– GENERAL DESCRIPTION The AD7730L is a complete low power analog front-end for weigh-scale and pressure measurement applications. The device accepts low level signals directly from a transducer and outputs a serial digital word. The input signal is applied to a proprietary programmable gain front end based around an analog modula- tor. The modulator output is processed by a low pass program- mable digital filter, allowing adjustment of filter cutoff, output rate and settling-time. The part features two buffered differential programmable gain analog inputs as well as a differential reference input. The part operates from a single +5 V supply and typically consumes less than 3 mA. It accepts four unipolar analog input ranges: 0 mV to +10 mV, +20 mV, +40 mV and +80 mV and four bipolar ranges ±10 mV, ±20 mV, ±40 mV and ±80 mV. The peak-to- peak resolution achievable directly from the part is 1 in 110,000 counts. An on-chip 6-bit DAC allows the removal of TARE voltages. Clock signals for synchronizing ac excitation of the bridge are also provided. The serial interface on the part can be configured for three-wire operation and is compatible with microcontrollers and digital signal processors. The AD7730L contains self-calibration and system calibration options and features an offset drift of less than 5 nV/ °C and a gain drift of less than 3 ppm/°C. The part is available in a 24-lead SOIC and 24-lead TSSOP package. SIGMA- DELTA MODULATOR AD7730L 6-BIT DAC SERIAL INTERFACE AND CONTROL LOGIC REGISTER BANK CLOCK GENERATION PROGRAMMABLE DIGITAL FILTER SIGMA-DELTA A/D CONVERTER BUFFER PGA 100nA AGND 100nA AVDD VBIAS AIN1(+) AIN1(–) AIN2(+)/D1 AIN2(–)/D0 ACX ACX STANDBY SYNC MCLK IN MCLK OUT SCLK CS DIN DOUT RESET RDY POL DGND AGND AVDD DVDD REF IN(–) REF IN(+) MUX REFERENCE DETECT AC EXCITATION CLOCK + – REV. A |
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