STA321MPL datasheet(33/50 Pages) STMICROELECTRONICS

33 / 50 page

STA321MP

Registers

Doc ID 022647 Rev 1

33/50

7.2.26

Channel input mapping channels 1 and 2 (0x1B)

7.2.27

Channel input mapping channels 3 and 4 (0x1C)

7.2.28

Channel input mapping channels 5 and 6 (0x1D)

7.2.29

Channel input mapping channels 7 and 8 (0x1E)

Each channel received via I2S can be mapped to any internal processing channel via the

channel input mapping registers. This allows for flexibility in processing, simplifies output

stage designs, and enables the ability to perform crossovers. The default settings of these

registers map each I2S input channel to its corresponding processing channel.

C2IM2

C2IM1

C2IM0

C1IM2

C1IM1

C1IM0

000

C4IM2

C4IM1

C4IM0

C3IM2

C3IM1

C3IM0

010

C6IM2

C6IM1

C6IM0

C5IM2

C5IM1

C5IM0

100

C8IM2

C8M1

C8IM0

C7IM2

C7IM1

C7IM0

110

CnIM[2:0]

Serial input from

000

Channel 1

001

Channel 2

010

Channel 3

011

Channel 4

100

Channel 5

101

Channel 6

110

Channel 7

111

Channel 8

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