HT66F13 datasheet(86/173 Pages) HOLTEK

86 / 173 page

Single Pulse Mode

To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 10 respectively and

also the TnIO1 and TnIO0 bits should be set to 11 respectively. The Single Pulse Output Mode, as the

name suggests, will generate a single shot pulse on the TM output pin.

The trigger for the pulse output leading edge is a low to high transition of the TnON bit, which can be

implemented using the application program. However in the Single Pulse Mode, the TnON bit can also

be made to automatically change from low to high using the external TCKn pin, which will in turn

initiate the Single Pulse output. When the TnON bit transitions to a high level, the counter will start

running and the pulse leading edge will be generated. The TnON bit should remain high when the

pulse is in its active state. The generated pulse trailing edge will be generated when the TnON bit is

cleared to zero, which can be implemented using the application program or when a compare match

occurs from Comparator A.

HT66F13/HT66F14/HT66F15

Enhanced A/D Flash Type MCU

Rev. 1.10

February 9, 2011

Counter Value

CCRP

CCRA

TnON

TnPAU

TnPOL

CCRP Int.

Flag TnPF

CCRA Int.

Flag TnAF

TM O/P Pin

(TnOC=1)

Time

Counter cleared

by CCRA

Pause Resume

Counter Stop if

TnON bit low

Counter Reset when

TnON returns high

TnDPX = 1; TnM [1:0] = 10

PWMDutyCycle

set by CCRP

PWM resumes

operation

Output controlled by

other pin-shared function

Output Inverts

when TnPOL = 1

PWM Period

set by CCRA

TM O/P Pin

(TnOC=0)

PWM Mode -- TnDPX = 1

Note:

1. Here TnDPX=1 -- Counter cleared by CCRA

2. A counter clear sets the PWM Period

3. The internal PWM function continues even when TnIO [1:0] = 00 or 01

4. The TnCCLR bit has no influence on PWM operation

HT66F13 Fiches technique(PDF) 86 Page - Holtek Semiconductor Inc

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