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STM8L101F1P3ATR Fiches technique(PDF) 38 Page - STMicroelectronics |
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STM8L101F1P3ATR Fiches technique(HTML) 38 Page - STMicroelectronics |
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38 / 81 page ![]() Electrical parameters STM8L101xx 38/81 Doc ID 15275 Rev 11 9.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 10. Figure 10. Pin input voltage 9.2 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. VIN STM8L PIN Table 13. Voltage characteristics Symbol Ratings Min Max Unit VDD- VSS External supply voltage -0.3 4.0 V VIN Input voltage on true open drain pins (PC0 and PC1)(1) 1. Positive injection is not possible on these I/Os. VIN maximum must always be respected. IINJ(PIN) must never be exceeded. A negative injection is induced by VIN<VSS. VSS-0.3 V DD + 4.0 Input voltage on any other pin (2) 2. IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. VSS-0.3 4.0 VESD Electrostatic discharge voltage see Absolute maximum ratings (electrical sensitivity) on page 63 |
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