STM8L15 datasheet(77/122 Pages) STMICROELECTRONICS

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STM8L151xx, STM8L152xx

Electrical parameters

Doc ID 15962 Rev 5

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LCD enabled with internal LCD booster VLCD = 3 V , 1/4 duty, 1/3 bias, division ratio = 64, all pixels active, no LCD

connected.

Oscillator bypassed (LSEBYP = 1 in CLK_ECKCR). When configured for extenal crystal, the LSE consumption

(IDD LSE) must be added. Refer to Table 31

RTC enabled. Clock source = LSE

10. Wakeup time until start of interrupt vector fetch.

The first word of interrupt routine is fetched 4 CPU cycles after tWU.

11. ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 register.

Table 24.

Typical current consumption in Active-halt mode, RTC clocked by LSE external crystal

Symbol

Parameter

Condition

Typ

Unit

IDD(AH)

(1)

Supply current in Active-halt

mode

VDD = 1.8 V

LSE

1.15

µA

LSE/32(2)

1.05

VDD = 3 V

LSE

1.30

LSE/32(2)

1.20

VDD = 3.6 V

LSE

1.45

LSE/32(2)

1.35

Based on measurements on bench with 32.768 kHz external crystal oscillator.

RTC clock is LSE divided by 32.

Table 25.

Total current consumption and timing in Halt mode at VDD = 2 V

Symbol

Parameter (1)(2)

Condition

Typ

(1)(2)

Max

(1)(2)

Unit

IDD(Halt)

Supply current in Halt mode

(Ultra low power ULP bit =1 in

the PWR_CSR2 register)

TA = -40 °C to 25 °C

350

1400

TA = 55 °C

580

2000

TA = 85 °C

1160

2800

TA = 105 °C

2560

6700

IDD(WUHalt)

Supply current during wakeup

time from Halt mode (using

HSI)

2.4

tWU_HSI(Halt)

(3)(4)

Wakeup time from Halt to Run

mode (using HSI)

4.7

6.2

µs

tWU_LSI(Halt)

(3)(4)

Wakeup time from Halt mode

to Run mode (using LSI)

150

µs

TA = -40 to 125 °C, no floating I/O, unless otherwise specified

Based on characterization results, unless otherwise specified

ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 register

Wakeup time until start of interrupt vector fetch.

The first word of interrupt routine is fetched 4 CPU cycles after tWU

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