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C5NPD0-DS Fiches technique(PDF) 82 Page - Freescale Semiconductor, Inc

No de pièce C5NPD0-DS
Description  C-5 Network Processor Silicon Revision D0
PDF  100 Pages
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Fabricant  FREESCALE [Freescale Semiconductor, Inc]
Site Internet  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

C5NPD0-DS Fiches technique(HTML) 82 Page - Freescale Semiconductor, Inc

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CHAPTER 3: ELECTRICAL SPECIFICATIONS
C5NP
MDIO Serial Interface Timing Specifications
The MDIO serial interface timing is shown in Figure 19 and described in Table 47.
Figure 19 MDIO Serial Interface Timing Diagram
Tpah
PAD/P_ctl Hold
0.0
ns
Tpao
PAD/P_ctl Output
2.0
6.0
ns
Tpaz
PAD/P_ctl Clk to Tri‡
1.8
5.5
ns
Tpav
PAD/P_ctl Clk to Driven‡
1.3
5.5
ns
Tpgs
PGNTX Setup
5.1
ns
Tpgh
PGNTX Hold
0.0
ns
Tpis
PIDSEL Setup
5.0
ns
Tpih
PIDSEL Hold
0.0
ns
PRSTX**
ns
PINTA**
ns
* 66MHz PCI
† P_ctl includes all PCI control parameters including: PPAR, PFRAMEX, PTRDYX, PIRDYX,
PSTOPX, PDEVSELX, PPERRX, PSERRX
‡ Not fully tested, values based on design/characterization.
** Asynchronous
Table 46 PCI Timing Description (continued) (continued)
SYMBOL
PARAMETER
MIN
TYP
MAX
UNIT
Cycle 2
Cycle 3
Cycle 4
Tsic
Tsids
SICL
SIDA
(output)
SIDA
(input)
Tsods Tsodh
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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