ATtiny10 datasheet(13/168 Pages) ATMEL

13 / 168 page

8127C–AVR–10/09

ATtiny4/5/9/10

• Bit 6 – T: Bit Copy Storage

The Bit Copy instructions BLD (Bit LoaD) and BST (Bit STore) use the T-bit as source or desti-

nation for the operated bit. A bit from a register in the Register File can be copied into T by the

BST instruction, and a bit in T can be copied into a bit in a register in the Register File by the

BLD instruction.

• Bit 5 – H: Half Carry Flag

The Half Carry Flag H indicates a Half Carry in some arithmetic operations. Half Carry is useful

in BCD arithmetic. See document “AVR Instruction Set” and section “Instruction Set Summary”

on page 151 for detailed information.

• Bit 4 – S: Sign Bit, S = N

⊕ V

The S-bit is always an exclusive or between the Negative Flag N and the Two’s Complement

Overflow Flag V. See document “AVR Instruction Set” and section “Instruction Set Summary” on

page 151 for detailed information.

• Bit 3 – V: Two’s Complement Overflow Flag

The Two’s Complement Overflow Flag V supports two’s complement arithmetics. See document

“AVR Instruction Set” and section “Instruction Set Summary” on page 151 for detailed

information.

• Bit 2 – N: Negative Flag

The Negative Flag N indicates a negative result in an arithmetic or logic operation. See docu-

ment “AVR Instruction Set” and section “Instruction Set Summary” on page 151 for detailed

information.

• Bit 1 – Z: Zero Flag

The Zero Flag Z indicates a zero result in an arithmetic or logic operation. See document “AVR

Instruction Set” and section “Instruction Set Summary” on page 151 for detailed information.

• Bit 0 – C: Carry Flag

The Carry Flag C indicates a carry in an arithmetic or logic operation. See document “AVR

Instruction Set” and section “Instruction Set Summary” on page 151 for detailed information.

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