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H8SX1663 Fiches technique(PDF) 186 Page - Renesas Technology Corp |
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H8SX1663 Fiches technique(HTML) 186 Page - Renesas Technology Corp |
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186 / 1158 page ![]() Section 6 Bus Controller (BSC) Rev.1.00 Jun. 07, 2006 Page 134 of 1102 REJ09B0294-0100 6.2 Register Descriptions The bus controller has the following registers. • Bus width control register (ABWCR) • Access state control register (ASTCR) • Wait control register A (WTCRA) • Wait control register B (WTCRB) • Read strobe timing control register (RDNCR) • CS assertion period control register (CSACR) • Idle control register (IDLCR) • Bus control register 1 (BCR1) • Bus control register 2 (BCR2) • Endian control register (ENDIANCR) • SRAM mode control register (SRAMCR) • Burst ROM interface control register (BROMCR) • Address/data multiplexed I/O control register (MPXCR) • DRAM control register (DRAMCR) • DRAM access control register (DRACCR) • Synchronous DRAM control register (SDCR) • Refresh control register (REFCR) • Refresh timer counter (RTCNT) • Refresh time constant register (RTCOR) |
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