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STPCATLAS Fiches technique(PDF) 103 Page - STMicroelectronics

No de pièce STPCATLAS
Description  X86 Core PC Compatible System-on-Chip for Terminals
PDF  111 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPCATLAS Fiches technique(HTML) 103 Page - STMicroelectronics

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DESIGN GUIDELINES
Issue 1.0 - July 24, 2002
103/111
As the PCB acts as a heat sink, the layout of top
and ground layers must be done with care to
maximize the board surface dissipating the heat.
The only limitation is the risk of losing routing
channels. Figure 6-36 and Figure 6-37 show a
routing with a good thermal dissipation thanks to
an optimized placement of power and signal vias.
The ground plane should be on bottom layer for
the best heat spreading (thicker layer than internal
ones) and dissipation (direct contact with air). .
Figure 6-36. Layout for Good Thermal Dissipation - top layer
1
A
3.3V ball
2.5V ball (Core / PLLs)
Via
STPC ball
GND ball
Not Connected ball



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