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STLC5048 Fiches technique(PDF) 4 Page - STMicroelectronics |
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STLC5048 Fiches technique(HTML) 4 Page - STMicroelectronics |
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4 / 45 page ![]() STLC5048 4/45 PIN DESCRIPTION (continued) ANALOG PIN DESCRIPTION NOT CONNECTED POWER SUPPLY PIN DESCRIPTION No. Name Type Description 33 VFRO0 AO Receive analog amplifier output channel 0. PCM data received on the programmed Time Slot on DR input is decoded and appears at this output. 39 VFRO1 AO Receive analog amplifier output channel 1. PCM data received on the programmed Time Slot on DR input is decoded and appears at this output. 42 VFRO2 AO Receive analog amplifier output channel 2. PCM data received on the programmed Time Slot on DR input is decoded and appears at this output. 48 VFRO3 AO Receive analog amplifier output channel 3. PCM data received on the programmed Time Slot on DR input is decoded and appears at this output. 35 VFXI0 AI TX Input Amplifier channel 0. Typ 1M Ω input impedance 38 VFXI1 AI TX Input Amplifier channel 1. Typ 1M Ω input impedance 43 VFXI2 AI TX Input Amplifier channel 2. Typ 1M Ω input impedance 46 VFXI3 AI TX Input Amplifier channel 3. Typ 1M Ω input impedance 40 CAP AGND Voltage filter pin: a 100nF capacitor must be connected between ground and this pin. 34 ITH AO SLIC Off Hook detection threshold. 47 ILIM AO SLIC line current limitation. 49 VBG AI SLIC VBG reference for DC characterisrics programmability. 2, 18, 63, 1 N.C. Not Connected, must be left open 32, 64 RES Reserved pins, must be connected to ground 25,36, 37,44, 45,56 VCC0..5 APS Total 6 pins: 3.3V analog power supplies, should be shorted together, require 100nF decoupling capacitor to VEE. 26,30, 31,50, 51,55 VEE0..5 APS Total 6 pins: analog ground, should be shorted together. 9 VDD DPS Digital Power supply 3.3V, require 100nF decoupling capacitor to VSS. 8 VSS DPS Digital Ground. 41 SUB DPS Substrate connection. Must be shorted together with VEE and VSS pins. |
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