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STLC5048 Fiches technique(PDF) 33 Page - STMicroelectronics

No de pièce STLC5048
Description  FULLY PROGRAMMABLE FOUR CHANNEL CODEC AND FILTER
PDF  45 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC5048 Fiches technique(HTML) 33 Page - STMicroelectronics

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STLC5048
ELECTRICAL CHARACTERISTCS
Typical value are for 25°C and nominal supply voltage. Minimum and maximum values are guaranteed over the
temperature 0-70°C range by production testing and supply voltage range shown in the Operating Ranges. Per-
formances over -40 +85°C range are guaranteed by product characterisation unless otherwise specified.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
DIGITAL INTERFACE
Vil
Input Voltage Low DI pins
0
0.2Vdd
V
Vih
Input Voltage High DI pins
0.8Vdd
5.5
V
Iil
Input Current Low DI pins
-10
10
µA
Iih
Input Current High DI pins
-10
10
µA
Ci
Input Capacitance (all dig. inp.)
5
pF
Vol
Output Voltage Low DX, TSX pins Iol=3.2mA (other pins Iol=1mA)
0
0.4
V
Voh
Output Voltage High DX pin
Ioh=-3.2mA (other pins Iol=1mA)
0.85Vdd
Vdd
V
Note: all digital input are 5V tolerant.
ANALOG INTERFACE
RIX
Transmit Input Amplifier Input
Impedance (VFXI)
1M
Ω
ROR
Receive Output Impedance
1
Ω
POWER DISSIPATION
Idd(pd)
Power down Current
10
15
mA
Idd(act)
Active Current
55
70
mA
PCM INTERFACE TIMING
f(MCLK)
Master Clock Frequency
1.536
1.544
2.048
4.096
8.192
MHz
Twmh
Period of MCLK high
38
ns
Twml
Period of MCLK low
38
ns
Trm
MCLK rise time
10
ns
Tfm
MCLK fall time
10
ns
Thbf
Hold Time MCLK Low to FSX/R
High or Low
10
ns
Tsfb
Setup time FSX/R High to MCLK Low
10
ns
Tdmd
Delay Time, MCLK High to Data Valid
15
ns
Tdmz
Delay Time from MCLK(8) Low to
Data Output disabled
15
40
ns
Tdfd
Delay Time, FSX High to Data
Valid if FSX rises later than MCLK
rising edge
15
ns
Tdmt
Delay Time, from MCLK and FSX
both high to TSX Low
20
ns
Tzmt
Delay time from MCLK(8) low to
TSX disabled
15
40
ns
Tsdm
Setup time, DR Valid to MCLK Low
5ns
Thdm
Hold time, MCLK Low to DR
invalid
5ns



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