ST70235A datasheet(11/28 Pages) STMICROELECTRONICS

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ST70235A

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The FFT module is a slave DSP engine controlled

by the firmware running on an external controller.

It works off line and communicates with other

blocks through buffers controlled by the "Data

Symbol Timing Unit". The DSP executes a

program stored in a RAM area, which constitutes

a flexible element that allows for future system

enhancements.

DPLL

The Digital PLL module receives a metric for the

phase error of the pilot tone. In general, the clock

frequencies at the ends (transmitter and receiver)

do not match exactly. The phase error is filtered

and integrated by a low pass filter, yielding an

estimation

the

frequency

offset.

Various

processes can use this estimate to deal with the

frequency mismatch.

In particular, small accumulated phase error can

be compensated in the frequency domain by a

rotation of the received code constellation (Rotor).

Larger errors are compensated in the time domain

by inserting or deleting clock cycles in the sample

input sequence.

Eventually that leads to achieve less than 2ppm

between the two ends.

Mapper/Demapper, Monitor, Trellis Coding,

FEQ Update

The Demapper converts the constellation points

computed by the FFT to a block of bits. This

means

identify

point

QAM

constellation plane. The Demapper supports

Trellis coded demodulation and provides a Viterbi

maximum likelihood estimator. When the Trellis is

active, the Demapper receives an indication for

the most likely constellation subset to be used.

In the transmit direction, the mapper receives a bit

stream from the Trellis encoder and modulates

the bit stream on a set of carriers (up to 256). It

generates coordinates for 2n QAM constellation,

where n < 15 for all carriers.

The Mapper performs the inverse operation,

mapping a block of bits into one constellation

point (in a complex x+jy representation) which is

passed to the IFFT block. The Trellis Encoder

generates

redundant

bits

improve

the

robustness

the

transmission,

using

4-Dimensional Trellis Coded Modulation scheme.

This

feature

can

disabled.The

Monitor

computes error parameters for carriers specified

in the Demapper process. Those parameters can

be used for updates of adaptive filters coefficients,

clock phase adjustments, error detection, etc. A

series of values is constantly monitored, such as

signal power, pilot phase deviations, symbol

erasures generation, loss of frame, etc.

Generic TC Layer Functions

These functions relate to byte oriented data

streams. They are completely described in ANSI

T 1.4 13. Additions described in the Issue 2 of this

specification are also supported.

The data received from the demapper may be

split into

two

paths, one

dedicated

interleaved data flow the other one for a fast data

flow. No

external

RAM is needed

for the

interleaved path.

The

interleaving/deinterleaving

used

increase the error correcting capability of block

codes for error bursts.

After deinterleaving (if applicable), the data flow

enters a Reed-Solomon error correcting code

decoder, able to correct a number of bytes

containing bit errors.

The decoder also uses the information of previous

receiving stages that may have detected the error

bytes and have labelled them with an "erasure

indication". Each time the RS decoder detects and

corrects errors in a RS codeword, an RS

correction event is generated.

The occurrence of such events can be signalled to

the management layer.After the RS decoder, the

corrected byte stream is descrambled in the PMD

(Physical Medium Dependent) descramblers. Two

descramblers are used, for interleaved and

non-interleaved data flows. These are defined in

ANSI T1.413. After descrambling, the data flows

enter the Deframer that extracts and processes

bytes to support Physical layer related functions

according to ANSI T1.413. The ADSL frames

indeed contain physical layer-related information

in addition to the data passed to the higher layers.

In particular, the deframer extracts the EOC

(Embedded

Operations

Channel),

the

AOC

(ADSL Overhead Control) and the indicators bits

and passes them to the appropriate processing

unit (e.g. the transceiver controller). The deframer

also performs a CRC check (Cyclic Redundancy

Check) on the received frame and generates

events in case of error detection.Event counters

can be read by management processes.

The outputs of the deframer are an interleaved

and a fast data streams. These data streams can

either carry ATM cells or another type of traffic. In

the latter case, the ATM specific TC layer

functional block, described hereafter, is bypassed

and the data stream is directly presented at the

input of the interface module.

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