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NRF7002-QFAA-R7 Fiches technique(PDF) 27 Page - Nordic Semiconductor

No de pièce NRF7002-QFAA-R7
Description  nRF7002
PDF  61 Pages
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Fabricant  NORDIC [Nordic Semiconductor]
Site Internet  https://www.nordicsemi.com/
Logo NORDIC - Nordic Semiconductor

NRF7002-QFAA-R7 Fiches technique(HTML) 27 Page - Nordic Semiconductor

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9 OTP memory programming
nRF7002 includes a 128 x 32-bit OTP memory. This memory is partitioned into two regions, a factory
programmed region and a customer programmed region, each containing 64 x 32-bit locations.
The factory programmed region contains information related to production and trim values. The customer
programmed region contains:
• Encryption key used to protect the QSPI traffic (4 words)
• MAC addresses for VIF0 and VIF1 (4 words)
• Module level calibration coefficients (9 words)
• OTP memory protection control (4 words)
• Uncommitted region (43 words)
QSPI encryption is optional. This is enabled at runtime through a QSPI command. If this feature is not
required, the OTP memory locations can remain unprogrammed. For security reasons, the encryption key
cannot be read once programmed.
The MAC address fields in the OTP memory are accessed by firmware when powering up the device,
and presented to the host through a SPI/QSPI based event as part of the boot phase. The host driver
is responsible for configuring the MAC addresses as part of device configuration. As such, the MAC
addresses stored in OTP memory can be overwritten by the host. Using this mechanism, the MAC
addresses in the OTP memory can remain unprogrammed if an alternate host side storage is utilised.
Module level calibration coefficients can be calculated and stored in the OTP memory to enhance some
performance characteristics. The use of these are optional, but typically at least the crystal oscillator trim
value will be needed. The procedure for determining these calibration coefficients is beyond the scope of
this document.
Although the OTP memory is one time programmable, any bit still in a 1 state can be reprogrammed into a
0 state. To avoid deliberate or inadvertent modification of the OTP memory data, a protection mechanism
is provided. The protection registers initially need to be programmed to 0x50FA50FA in order to activate
programming of the remaining locations. Once OTP memory programming is complete, the protection
registers should be programmed to 0x00000000, at which point the OTP memory can never be modified.
In addition to the logical protection mechanism described above, a programming voltage needs to be
applied to the OTPVDD pin in order to enable programming. The programming voltage is 2.5 V, while
for reads it is 1.8 V. To coordinate the OTPVDD supply voltage with read and write operations, it is
recommended to drive this supply from the POWERIOVDD output pin on nRF7002. This also ensures there
will be no leakage associated with the OTP memory across sleep cycles, where the digital supply rail is
removed.
The OTP memory is indirectly mapped, and as such read and writes are achieved using address, data,
and mode registers. The OTP memory programming utility implements this programming, along with
appropriate control of the OTPVDD supply through the POWERIOVDD output.
4486_184 v1.0
27



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