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MPC8309CVMADFC Fiches technique(PDF) 36 Page - NXP Semiconductors

No de pièce MPC8309CVMADFC
Description  PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
PDF  81 Pages
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Fabricant  NXP [NXP Semiconductors]
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MPC8309CVMADFC Fiches technique(HTML) 36 Page - NXP Semiconductors

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MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3
36
Freescale Semiconductor
USB
12 USB
12.1
USB Controller
This section provides the AC and DC electrical specifications for the USB (ULPI) interface.
12.1.1
USB DC Electrical Characteristics
The following table provides the DC electrical characteristics for the USB interface.
The following figures provide the AC test load and signals for the USB, respectively.
Figure 28. USB AC Test Load
Table 35. USB DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2.0
OVDD +0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current
IIN
—±5
A
High-level output voltage, IOH = –100 AVOH
OVDD –0.2
V
Low-level output voltage, IOL = 100 AVOL
—0.2
V
12.1.2
USB AC Electrical Specifications
The following table describes the general timing parameters of the USB interface.
Table 36. USB General Timing Parameters
Parameter
Symbol1
Min
Max
Unit
Note
USB clock cycle time
tUSCK
15
ns
Input setup to USB clock—all inputs
tUSIVKH
4—
ns
input hold to USB clock—all inputs
tUSIXKH
1—
ns
USB clock to output valid—all outputs (except
USBDR_STP_USBDR_STP)
tUSKHOV
—7
ns
USB clock to output valid—USBDR_STP
tUSKHOV
—7.5
ns
Output hold from USB clock—all outputs
tUSKHOX
2—
ns
Note
:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes USB timing
(USB) for the input (I) to go invalid (X) with respect to the time the USB clock reference (K) goes high (H). Also, tUSKHOX
symbolizes us timing (USB) for the USB clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or
output hold time.
Output
Z0 = 50 
OVDD/2
RL = 50 



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