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ADS5294IPFPR Fiches technique(PDF) 39 Page - Texas Instruments

No de pièce ADS5294IPFPR
Description  ADS5294 Octal-Channel 14-Bit 80-MSPS High-SNR and Low-Power ADC
PDF  82 Pages
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Fabricant  TI2 [Texas Instruments]
Site Internet  https://www.ti.com
Logo TI2 - Texas Instruments

ADS5294IPFPR Fiches technique(HTML) 39 Page - Texas Instruments

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0
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0
0
0
0
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1
0
0
0
0
0
0
0
0
SDATA
SCLK
CSZ
SDOUT
0
0
0
0
0
0
0
1
A) Enable Serial Readout (<READOUT> = 1)
REGISTER ADDRESS (A7:A0) = 0x01
REGISTER DATA (D15:D0) = 0x0001
Pin SDOUT is tri-stated
Pin SDOUT Becomes
Active and Forces Low
SDATA
SCLK
CSZ
SDOUT
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
B) Read Contents of Register 0x0F.
This Register has been Initialized with 0x0200
(The Device was earlier put in global power down)
REGISTER ADDRESS (A7:A0) = 0x0F
REGISTER DATA (D15:D0) = XXXX (don’t care)
A7
A6
A5
A4
A3
A2
A1
A0
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SDOUT Output Contents of Register 0x0F in the same cycle, MSB first
39
ADS5294
www.ti.com
SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018
Product Folder Links: ADS5294
Submit Documentation Feedback
Copyright © 2011–2018, Texas Instruments Incorporated
Programming (continued)
Figure 52. Serial Readout Timing
9.5.1.3 Default States After Reset
•
Device is in normal operation mode with 14-bit ADC enabled for all channels
•
Output interface is 1-wire, 14×-serialization with 7×-bit clock and 1×-frame clock frequency
•
Serial readout is disabled
•
PDN pin is configured as global power-down pin
•
Digital gain is set to 0 dB
•
Digital modes such as LFNS and digital filters are disabled



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